Docs / LS XG5000
LS XG5000 audit guide
.xgwx workspace exports audit end-to-end on the partial-decode path: controller metadata, IO + Network modules, tasks, program names, the global Symbols tag table (with Korean / Latin comments), per-rung ladder display text, the element-graph topology (contacts / OUT-coils / SET / RST) decoded into the reference graph so latchOps and unlatchOps surface alongside read / write references, AND the Symbol → device-address bridge that resolves a Symbol's P-area address byte to the concatenated ladder operand format (GL1 → P00041). The bridge marks Symbols as Alias-kind so R002 / R005 / R014 / R022 / R023 / R047 route through every vendor-neutral alias-aware rule without LS-specific gates. Legacy .prj / .xgp binary projects still ride the text-island probing skeleton — full container decode is gated on real customer corpus availability.
Supported formats
XG5000 workspace (binary)
stable.xgwx
XG5000 legacy project (binary)
preview.prj / .xgp
Known limitations
• .xgwx tag-axis rules apply (R001 naming, R002 I/O duplicates, R007 description, R016 reserved keyword, etc.) thanks to the Symbols decode. Per-rung display text + the element-graph reference / latchOps / unlatchOps emission activate the IR layer cross-vendor rules consume. The Symbol → device-address bridge marks Symbols as Alias-kind so R002 catches duplicate-address mappings, R005 treats bridged addresses as declared, and R014 / R022 / R023 / R047 evaluate honestly against the alias surface.
• M / T / C / F / D area operands carry no Symbol alias on the locked corpus and are skipped by R005's LS device-address regex (they are hardware-implicit system tags, not user-declared identifiers). When future corpus introduces named symbols for those classes, the parser's resolveLsSymbolAddress can extend the formula and the rules pick the symbols up without code changes.
• Rules whose semantics are Rockwell-specific (R010 latch/unlatch pairing, R040 OTL on input, R041 OTU on input, R044 OTL+OTU same rung) stay vendor-gated; latchOps and unlatchOps emission readies the IR for any future cross-vendor latch rule.
• Legacy .prj / .xgp uploads stay on text-island probing only — meaningful only when the project embeds IEC ST text fragments. Full container decode is corpus-gated (≥5 real customer .prj / .xgp samples); engineering estimate is 4-6 weeks once unblocked.
• K-area direct addressing rules pending Phase 5 vendor-specific expansion.
• Task period vs scan correlation not yet rule-encoded.
Workflow
1. Preferred for new projects: upload the .xgwx workspace directly. Coverage badge surfaces partial-decode. The audit reports controllerName, modules, tasks, program names, the Symbols tag table (with Korean comments and Symbol → device-address bridge), per-rung ladder display text, and the element-graph reference / latchOps / unlatchOps surface for downstream cross-vendor rules.
2. Alternative: in XG5000, switch to IEC mode (View → IEC) and export programs as .st text. Upload the .st files for an alternative parser pipeline with named-symbol references resolved via the IEC path.
3. XGI-mode projects produce meaningful findings on either path; XGK-mode binary uploads produce limited signal — prefer .xgwx or .st text export.